Flash memories widely used as nonvolatile memory devices are regarded as being limited in the improvement of integration density. As a nonvolatile memory device enabling the so-called 4F2 cell area, which realizes a higher integration density than flash memories, a cross-point nonvolatile memory device has been drawing attention. The cross-point nonvolatile memory device is configured so that, for instance, a memory portion having variable electrical resistance is sandwiched between two electrodes (JP-A 2007-184419 (Kokai)).
In the cross-point nonvolatile memory device, it is desired to reduce the current flowing in the memory portion and suppress the power consumption.
JP-A 2006-210882 (Kokai) proposes a technique for a nonvolatile memory device. In this technique, a contact hole is provided in an insulating layer on a lower electrode connected to a transistor. A memory portion is provided so as to fill the contact hole.